Emulation of Artificial Neural Network on an FPGA-based Accelerator using CYCLONE II
Sarita Chauhan1, Bahadur Singh2, Bhajanlal Vishnoi3, Subhash Saini4, Vikas Kala5
1Smt. Sarita Chauhan, Manikya Lal Verma Textile and Engineering College, Pratap Nagar, Bhilwara, Rajasthan, India.
2Bahadur Singh, Manikya Lal Verma Textile and Engineering College, Pratap Nagar, Bhilwara, Rajasthan, India.
3Bhajanlal Vishnoi, Manikya Lal Verma Textile and Engineering College, Pratap Nagar, Bhilwara, Rajasthan, India.
4Subhash Saini, Manikya Lal Verma Textile and Engineering College, Pratap Nagar, Bhilwara, Rajasthan, India.
5Vikas Kala, Manikya Lal Verma Textile and Engineering College, Pratap Nagar, Bhilwara, Rajasthan, India.
Manuscript received on March 31, 2015. | Revised Manuscript received on April 05, 2015. | Manuscript published on April 15, 2015. | PP: 32-39 | Volume-3 Issue-5, April 2015. | Retrieval Number: E0842043515/2015©BEIESP
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© The Authors. Published By: Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: Analog VLSI circuits are being used successfully to implement Artificial Neural Networks (ANNs). These analog circuits exhibit nonlinear transfer function characteristics and suffer from device mismatches, degrading network performance. Because of the high cost involved with analog VLSI production, it is beneficial to predict implementation performance during design. We used hardware time multiplexing to scale network size and maximize hardware usage. An on-chip CPU controls the data flow through various memory systems to allow for large test sequences. We show that Block-RAM availability is the main implementation bottleneck and that a trade-off arises between emulation speed and hardware resources. However, we can emulate large amounts of synapses on an FPGA with limited resources. We have obtained a speedup of 30.5 times with respect to an optimized software implementation on a desktop computer.
Keywords: Artificial neural networks, analog VLSI emulation, FPGA-based accelerators, hardware time multiplexing, embedded systems.